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STM32F103 instructions
1 Documentation conventions
List of abbreviations for registers
The following abbreviations are used in register descriptions:
Glossary
● Low-density devicesare STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
● Medium-density devicesare STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
● High-density devicesare STM32F101xx and STM32F103xx microcontrollers where
the Flash memory density ranges between 256 and 512 Kbytes.
● XL-density devicesare STM32F101xx and STM32F103xx microcontrollers where the
Flash memory density ranges between 768 Kbytes and 1 Mbyte.
● Connectivity line devicesare STM32F105xx and STM32F107xx microcontrollers.
● Word:data of 32-bit length.
● Half-word:data of 16-bit length.
● Byte:data of 8-bit length.
Peripheral availability
For peripheral availability and number across all STM32F10xxx sales types, please refer to
the low-, medium-, high- and XL-density STM32F101xx and STM32F103xx datasheets, to
the low- and medium-density STM32F102xx datasheets and to the connectivity line devices,
STM32F105xx/STM32F107xx.
2 Memory and bus architecture
System architecture
In low-, medium-, high- and XL-density devices, the main system consists of:
● Four masters:
– Cortex™-M3 core DCode bus (D-bus) and System bus (S-bus)
– GP-DMA1 & 2 (general-purpose DMA)
● Four slaves:
– Internal SRAM
– Internal Flash memory
–FSMC
– AHB to APBx (APB1 or APB2), which connect all the APB peripherals
anization
Program memory, data memory, registers and I/O ports anized within the same linear
4-Gbyte address space.
The bytes are coded in memory in Little Endian format. The lowest numbered byte in a word
is considered the word’s least significant byte and the highest numbered byte the most
significant.
For the detailed mapping of peri