文档介绍：王奕 Estelle.******@gmail. com Computer Architecture ComputerArchitecture Chapter 5 Memory - Hierarchy Design 2017/11/12 Computer Architecture Chapter 5 Memory - Hierarchy Design Introduction 390 Review of the ABCs of Caches 392 Cache Performance 406 Reducing Cache Miss Penalty 413 Reducing Miss Rate 423 Reducing Cache Miss Penalty or Miss Rate via Parallelism 435 Reducing Hit Time 443 Main Memory anizations for Improving Performance 448 Memory Technology 454 2 2017/11/12 ARE THERE ANY PROBLEM IN THE MEMORY Processor-Memory Performance Gap Introduction C a c h e Memory CPU I/Odevices Memory bus I/O bus Registers Size: 500B 64KB 512MB 100GB Speed: 1ns 100ns 5ms Register reference Cache reference Memory reference Disk Memory reference 2017/11/12 CPU-DRAM Gap 1980: no cache in µproc; 1995 2-level cache on chip (1989 first Intel µproc with a cache on chip) Who Cares About the Memory Hierarchy? µProc 60%/yr. DRAM 7%/yr. 1 10 100 1000 1980 1981 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 DRAM CPU 1982 Processor-Memory Performance Gap: (grows 50% / year) Performance “Moore’s Law” “Less’ Law?” 2017/11/12 Generations of Microprocessors 及CPU与cache速度的差异 Time of a full cache miss in instructions executed: 1st Alpha: 340 ns/ ns =  68 clks x 2 or 136 2nd Alpha: 266 ns/ ns =  80 clks x 4 or 320 3rd Alpha: 180 ns/ ns =108 clks x 6 or 648 Alpha 21264 is a microprocessor designed for desktops and servers. Two classes puters have different concerns in memory hierarchy. puters: are primarily running one application for single user are concerned more with average latency from the memory hierarchy. puters: May typically have hundreds of users running potentially dozens of applications simultaneously. Are concerned about memory bandwidth. 2017/11/12 Enhance speed of memory 加快存储体的速度 Component character of hardware: (