文档介绍：Page 133 Friday, January 18, 2002 9:00 AM
CHAPTER
4
THE WIRE
Determining and quantifying interconnect parameters
n
Introducing circuit models for interconnect wires
n
Detailed wire models for SPICE
n
Technology scaling and its impact on interconnect
Introduction The Transmission Line
A First Glance SPICE Wire Models
Interconnect Parameters — Capacitance, Distributed rc Lines in SPICE
Resistance, and Inductance Transmission Line Models in SPICE
Capacitance Perspective: A Look into the Future
Resistance
Inductance
Electrical Wire Models
The Ideal Wire
The Lumped Model
The Lumped RC model
The Distributed rc Line
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134 THE WIRE Chapter 4
Throughout most of the past history of integrated circuits, on-chip interconnect wires were
considered to be second class citizens that had only to be considered in special cases or
when performing high-precision analysis. With the introduction of deep-submicron semi-
conductor technologies, this picture is undergoing rapid changes. The parasitics effects
introduced by the wires display a scaling behavior that differs from the active devices such
as transistors, and tend to gain in importance as device dimensions are reduced and circuit
speed is increased. In fact, they start to dominate some of the relevant metrics of digital
integrated circuits such as speed, energy-consumption, and reliability. This situation is
aggravated by the fact that improvements in technology make the production of ever-
larger die sizes economically feasible, which results in an increase in the average length of
an interconnect wire and in the associated parasitic effects. A careful and in-depth analysis
of the role and the behavior of the interconnect wire in a semiconductor technology is
therefore not only desirable