文档介绍：摘要
FPGA(Field-Programmable Gate Array),即现场可编程门阵列,它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。目前以硬件描述语言(Verilog 或 VHDL)所完成的电路设计,可以经过简单的综合与布局,快速的烧录至 FPGA 上进行测试,是现代 IC 设计验证的技术主流。这些可编辑元件可以被用来实现一些基本的逻辑门电路(比如AND、OR、XOR、NOT)或者更复杂一些的组合功能比如解码器或数学方程式。在大多数的FPGA里面,这些可编辑的元件里也包含记忆元件例如触发器(Flip-flop)或者其他更加完整的记忆块。系统设计师可以根据需要通过可编辑的连接把FPGA内部的逻辑块连接起来,一个出厂后的成品FPGA的逻辑块的连接可以按照设计者而改变,所以FPGA可以完成所需要的逻辑功能。
本文设计的实验板目的就是验证所设计的电路的逻辑功能。实验板以EP1C6Q240C8为主,配以存储器、数据配置、复位、实时时钟、I/O口分配、扩展接口、独立按键及LED、液晶显示、数码管显示、蜂鸣器和电源等功能电路。而其中的独立按键及LED、液晶显示、数码管显示、蜂鸣器就是验证时的直接展现。
关键字:FPGA,硬件原理图,测验
ABSTRACT
FPGA(Field-Programmable Gate Array),It is based on the further development of the product of PAL、GAL、CPLD etc.. It is in the field of application-specific integrated circuit (ASIC) for a half customize the circuit, it solves the shortage, and custom circuit es original programmable gate device limited number of faults. pleted the above circuit design by the Hardware description language, can pass by the simple integrated and layout, rapid replication to test on FPGA, it is the mainstream of modern IC design verification. These can ponent can be used to achieve some basic logic gate(such as AND、OR、XOR、NOT ) or, bination of some functions such as decoder or mathematical equations. In most of the FPGA, these can ponent also includes memory devices such as flip-flop or other plete memory block. According to the system designer, through the FPGA links can edit the internal logic pieces together. One of the products of the factory, logical block of FPGA can be changed according to the designer, so the FPGA plete the required logic functions.
The purpose of this experimental plate is to verify that the logic function of circuit. The primary device is EP1C6Q240C8 on this experimental plate, use with the circuit of memory, Data configuration, reset, real-time clock, I/O port, expand interface, independent buttons and LED, LCD display, digital display, buzzers and power