文档介绍：设计规则解析
以TSMC m 硅栅N阱CMOS工艺的部分设计规则为例
一、几点说明
1. MASK NAMES (Layer)
PW --- Definition of P-Well.
NW --- Definition of N-Well.
OD --- Definition of thin oxide for device, and interconnection.
PO --- Definition of Poly-Si.
PP --- Definition of P+ implantation.
NP --- Definition of N+ implantation.
CO --- Definition of contact window from M1 to OD or PO.
M1 --- Definition of 1st metal for interconnection.
VIA1 -- Definition of via1 hole between M2 and M1.
M2 --- Definition of 2nd metal for interconnection.
CB --- Definition of bonding pad.
2. Terminology Definitions for Region
N+ OD : OD covered with NP.
P+ OD : OD covered with PP.
Cold N-Well : N-Well connected to the most positive voltage (Vdd).
Hot N-Well : N-Well not connected to the most positive voltage
Hot N+ diffusion : all N+ diffusion regions outside the N-Well which have
a potential not equal to the substrate voltage.
Hot P+ diffusion : all P+ diffusion regions inside the N-Well which have a
potential not equal to the N-Well potential.
Cold diffusions :
Outside N-Well : a diffusion which has the potential the same as the substrate.
Inside N-Well : a diffusion which has the potential the same as the N-Well.
3. Terminology Definitions for Rule
WIDTH
SPACE :
CLEARANCE :
EXTENSION :
OVERLAP :
二、N-Well Rule
Minimum dimension of a NW region A m
Minimum space between tow NW regions B m
with different potential
(include NW resistor)
Minimum dimension of a hot NW region A1 m
( NW resistance)
Minimum space between tow NW regions C m
with the same potential
Merge if space is less than m
NW
NW
PW
A
A
A1
B
C
三、Thin Oxide Rule (active area)
Minimum width of an OD region to define A m
the width of NMOS/PMOS
Minimum width of an OD region for B m
interconnect (N+/or P+)
Minimum space between two OD regions C m
( both regions are either inside or outside
a N-well) which can be either N+ to N+,
P+ to P