文档介绍：Signal Integrity -- Board Design & Simulation Techniques Roy Leventhal 1/14/03
3Com Carrier R&D 1 01/14/03 Contents
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Process & Methodology 5 Top-Down & Iterative 5 Signal Integrity Engineering Skills 5 Getting Started 6 Reducing Risk & Trusting the Simulation 6 Caveat Emptor 6 The Iterative Process 14 *Robust Design: Plan for DOE of: 15 Introduction 15 Designing the Experiment 15 Set Up and Run the Simulations: 16 Analyze the Results: 16 Optimization and Conclusions: 16 Resources: 17 3Com IBIS Model Standard 18 Variables for Simulation 18 IBIS Variables 18 Symbolic Representation of an IBIS Device – Input Side 20 Symbolic Representation of an IBIS Model – Output Side 21 Composite simulator variables: “Slow-Typ-Fast” 21 SPICE Variables 21 Environmental Variables 21 Board Variables 22 Topology & Termination Variables 24 Receiver Input Impedance and Matching 24 Driver Output Impedance and Matching 24 Performance Factors and Virtual Measurements 26 Switching Delay Times 26 Buffer Delay 26 Propagation Delay 26 First Switch Delay 26 Final Settle Delay 26 Rise Delay/Fall Delay 27 Comments on buffer delay: 27 Crosstalk 27 Ground-Power Bounce/SSN 27 Effect of Reflections on Crosstalk and Ground Bounce 27 Comprehensive Noise Simulation 28 Overshoot/Undershoot 28 Noise Margins 29 Monotonicity Requirements 31 Parasitics 31 Current Requirements/Power Dissipation 31 EMI 32 Signal Integrity 101 33 Tutorial - Courtesy of Cadence Design Systems 33 Signal Integrity Simulation Tools 33 3Com Carrier R&D 2 01/14/03 EMI Control 35 EMI Technical Discussion 35 Introduction 35 Sources and Receivers 35 Noise Signal Paths 36 Near and Far Fields: Coupling Vs Radiation 37 Conducted Paths: 37 Coupled Paths: 38 Radiated Paths: 38 Differential mon Mode Sig