Gigabit-speed Channel Design for PCI Express and Fully Buffered DIMM.pdf

文档介绍：Gigabit-speed Channel Design for PCI
Express and Fully Buffered DIMM
Speaker Name
Speaker Title/Position
1
Enabling High-Performance Design
Ansoft
SIwave Nexxim
Designer
Q3D
HFSS TPA
Extractor
AnsoftLinks & Optimetrics
Overview: Serial Links
Š Multi-gigabit data rate serial links
FB-DIMM Š XFP(10GB/s)
Š Cray(3GB/s) - Red Storm puter
Š Xilinx(3GB/s) – Vertex-II FPGA
Š PCI Express(3-5GB/s)
Š FB-DIMM(3-5GB/s) – Fully Buffered DIMM
DRAM DRAM
DRAM DRAM
Read Data DRAM Secondary DRAM
(Primary North) North
DRAM DRAM FB-DIMM
Memory 14
System Overview
Bridge AMB AMB
10
DRAM DRAM
Write Data Secondary
(Primary South) DRAM South DRAM
DRAM DRAM
DRAM DRAM
2
Overview: Reducing Risk and Cost
Š Die-to-Package-to-PCB-to-
System is plex
Package Backplane Connector Daughter Card Package
Š Multi-gigabit data rate serial link MS SL SL
+ +
Š On-Chip Driver/Receiver models - -
Via Via Via
Š ponent Interconnect
Š Chip to Package
Š Package to Daughter Card
Š Daughter Card to Backplane
Š 2D Transmission Lines
Š Power Delivery System Effects
Š Complex problems
= high risk
= high cost if done wrong
=> Solving them is requiring new
strategies and simulation tools
High Performance SI
Validation
Simulation
Extraction
3
High Performance SI:
Simulation Requirements
1. 3D/Full-Wave Models
2. Speed, Capacity, Reliability for Simulation
3. Multi-Domain Simulations
Š Frequency & Time Domain Simulations
4. Complex Power Delivery
High Performance SI
Š Speed = Problems
Š Evolution of a short circuit
SPEED
A. Fraser, S. Argyrakis, “Does Signal Integrity Engineering have a Future”, DesignCon 2003,.
4
“3-D models are in fashion…”
Source: EE Times
*Third party marks and brands are the property of their respective owners
Full-Wave S-Parameter Models
VHDMVHDM
ConnectorConnector
Floating
5
Full-Wave S-Parameter Models
Speed, Capacity, Reliability
Differe