基于FPGA的AVS解码器环路滤波器模块的设计.doc

文档介绍：山东大学
毕业设计(论文)
设计(论文)题目:基于FPGA的AVS解码器环路滤波器模块的设计
姓名____ 毛刚_ ___
学院_ 信息科学与工程学院__
专业_集成电路设计与集成系统_
年级______ 2012___ ____
指导教师______ 王祖强_ ____
2012年05月17日
目录
摘要 3
Abstract 3
第一章引言 4
第二章 AVS环路滤波算法 6
(Bs)的推导 7
8
Bs=2时进行强滤波 9
Bs=1时进行标准滤波 10
11
12
第三章 AVS环路滤波器系统结构设计 14
14
15
参数计算模块 15
控制模块 15
滤波模块 16
存储模块 17
块转置/暂存模块 18
19
20
第四章结论 25
致谢 26
参考文献 27
摘要
数字音视频编解码标准先进音视频编码标准(AVS)是我国自主制定的数字电视、IPTV等音视频系统的基础性标准。AVS标准是一种高效音视频编码技术,,并且实现方案简洁。尽管AVS标准的编码效率得到了极大提高,但运算复杂度也真大,对视频解码器的硬件实现提出了巨大的挑战。
本文研究了AVS标准,主要详细分析了去块效应环路滤波算法,并提出了实现环路滤波器模块的硬件结构。AVS 视频标准中,自适应环路滤波器在实现时在许多条件运算(如滤波强度的计算、边界阈值等的计算)及对于数据的访问比较繁琐,使得滤波器的算法复杂度很高。并且块效应可能出现在每个块的边界上。该滤波器以块为单位进行滤波,减少对存储器的访问,加快了处理速度,大大节省了算法的硬件实现面积。采用Verilog HDL语言进行设计、仿真、通过FPGA验证。
关键词:AVS标准;环路滤波器;块效应;去块;FPGA
Abstract
Audio Video Coding Standard(AVS),independently developed and owned by China, is a fundamental standard in digital TV, IPTV and other audio/video based systems. AVS is a highly efficient video coding technology. It has coding performance close to .What’s more, its implementation is simple and easy. Although the coding efficiency of the AVS is better than previous standards putational characteristics lead great challenges for now.
Base on analysis of AVS ,especially deblocking filter, this paper introduces the design of deblocking filter. According to the AVS coding standard, the adaptive loop filter exists many conditions operations ,and access to data is tedious in implementation. Those make plexity of filter algorithm very high. The block effect may appear in the borders of each 8×8 block, so the module is designed 8×8 as units in order to reduce the memory access which can highly speed up the processing speed and greatly save the hardware area of algorithm realization. The whole design has been designed and simulated with Verilog HDL, then verified by FPGA.