文档介绍：Operating System
Lecture Two
Hardware and OS
School of Software
Nanjing University
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本主题教学目标
复习计算机硬件系统的基本构成
复习处理器寄存器,着重掌握PSW、处理器状态、特权指令
掌握中断和指令执行周期
掌握中断和中断源,中断处理的基本准则
掌握中断响应和处理的过程
掌握中断优先级、终端屏蔽和多重中断处理
了解存储器的层次
掌握cache及其设计准则
了解三种输入输出控制方式
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Computer System Overview
Basic Elements
Processor Registers
Instruction Execution
Interrupts
The Memory Hierarchy
Cache Memory
I/munication Techniques
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Basic Elements
Processor
Main Memory
referred to as real memory or primary memory
Volatile (挥发的–持久的 persistent)
I/O modules
Secondary memory devices
Input/Output devices, munications equipment
System munication among processors, memory, and I/O modules
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Computer System Overview
Basic Elements
Processor Registers
Instruction Execution
Interrupts
The Memory Hierarchy
Cache Memory
I/munication Techniques
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Top-ponents
存储器地址寄存器(Memory Address Register, MAR)
存储器缓冲寄存器(Memory Buffer Register, MBR)
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Processor Registers
User-visible Registers
Enable programmer to minimize main-memory references by optimizing register use
Control and Status Registers
Used by processor to control operating of the processor
Used by operating-system routines to control the execution of programs
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User-Visible Registers
May be referenced by machine language
Available to all programs - application programs and system programs
Types of registers
Data register
Address register
Condition code register
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User-Visible Registers
Address Registers
Index register: involves adding an index to a base value to get an address
Segment pointer: when memory is divided into segments, memory is referenced by a segment and an offset
Stack pointer: points to top of stack
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Control and Status Registers
Condition Codes or Flags
Bits set by the processor hardware as a result of operations
Can be accessed by a program but not altered
Examples
positive result
negative result
zero
Overflow
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