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ALGORITHMS FOR VLSI
PHYSICAL DESIGN AUTOMATION
THIRD EDITION
Naveed A. Sherwani
Intel Corporation.
KLUWER ACADEMIC PUBLISHERS
NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW
This Page Intentionally Left Blank
ALGORITHMS FOR VLSI
PHYSICAL DESIGN AUTOMATION
THIRD EDITION
To my parents
Akhter and Akram Sherwani
Contents
Foreword xvii
Preface xix
Acknowledgements xxvii
1 VLSI Physical Design Automation 1
VLSI Design Cycle 3
New Trends in VLSI Design Cycle 7
Physical Design Cycle 9
New Trends in Physical Design Cycle 13
Design Styles 15
Full-Custom 17
Standard Cell 18
Gate Arrays 20
Field Programmable Gate Arrays 22
Sea of Gates 25
of Different Design Styles 25
System Packaging Styles 26
Die Packaging and Attachment Styles 26
Die Package Styles 26
Package and Die Attachment Styles 27
Printed Circuit Boards 27
Multichip Modules 29
Wafer Scale Integration 31
of Different Packaging Styles 31
Historical Perspectives 32
Existing Design Tools 33
Summary 35
2 Design and Fabrication of VLSI Devices 39
Fabrication Materials 40
Transistor Fundamentals 43
Basic Semiconductor Junction 43
TTL Transistors 45
viii Contents
MOS Transistors 46
Fabrication of VLSI Circuits 48
nMOS Fabrication Process 51
CMOS Fabrication Process 53
Details of Fa