文档介绍：>•InthesimplestCMOStechnologies,weneedto :同时输入低电平时才能获得高电平输出3PMOSandNMOSwafercrosssectionafterfabrication2-LevelMetalCMOS两层互连布线的CMOS有源器件(MOS、BJT等类似器件),必须在外加适当的偏置电压情况下,器件才能正常工作。对于MOS管,有源区分为源区和漏区,在进行互联之前,两者没有差别。4••••••••ChoosingaSubstrateActiveRegionNandPWellGateTiporExtensionSourceandDrainContactandLocalInterconnectMultilevelMetalizationProcessingPhases51µmPhotoresist40nmSiO2Choosethesubstrate(type,orientation,resistivity,wafersize)•Initialprocessing:-Wafercleaning -thermaloxidation,H2O (≈40nm,15min.***@900ºC) -nitrideLPCVD(低压化学气相沉积) (≈******@800ºC)•Substrateselection:-moderatelyhighresistivity(25-50ohm-cm)-(100)orientation-P-,(100),PType,25~50Ωcm1stMaskPhotoresist •******@100ºC(≈-µm)•Photolithography-Mask#1patternalignmentandUVexposure-Rinseawaynon-patternPR-DryetchtheNitridelayer--PlasmaetchwithFluorineCF4orNF4Plasma-StripPhotoresist(H2SO4或O2plasma)ActiveAreaDefinition(主动区)SiO2Si3N4Photoresist7•WetOxide(thickSiO2)-H2O(≈500nm,90min.***@1000ºC)•StripNitridelayer -Phosophoricacid(磷酸)orplasmaetch,选择性问题FieldOxideGrowth-LOCOS:LocalOxidationofSilicon(局部硅氧化工艺)SiO2Si3N4•薄的SiO2层,厚的Si3N4层,避免鸟喙(bird’sbeak)的影响•场区:很厚的氧化层,位于芯片上不做晶体管、电极接触的区域,可以起到隔离晶体管的作用。8•Photolithography(套刻)-Mask#2patternalignmentandUVexposure•IonImplantation离子注入 -B+ratethinSiO2andfieldSiO2--反型:半导体表面的少数载流子浓度等于体内的多数载流子浓度时,半导体表面开始反型。-150-200keVfor1013cm-2 --ImplantationEnergyandtotaldoseadjustedfordepthandconcentrationP-wellFabrication•StripPhotoresist-Rinseawaynon-•IonImplantation -P+ionbombardment-ratethinSiO2andfield SiO2-300-400keVfor1013cm-2 --ImplantationEnergyandtotaldoseadjustedfordepthandconcentration•StripPhotoresistN-wellFabrication•Photolithography-Mask#3patternalignmentandUVexposure