文档介绍：上海交通大学
硕士学位论文
一种数字信号处理器内核的设计与扩展
姓名:钟恺文
申请学位级别:硕士
专业:软件工程(集成电路设计)
指导教师:毛志刚
20090101
一种数字信号处理器内核的设计与扩展

摘要

集成电路设计和制造技术的不断发展使得数字信号处理器在通信、计算机、
消费电子等领域的应用越来越广泛。同时,数字信号处理算法不断趋于复杂化,
只依靠优化软件的方法已经很难提高信号处理器在某些场合下的性能。另外,日
益激烈的竞争也对数字信号处理器的灵活性和开发周期提出了更高的要求。
本文提出了一种数字信号处理器的结构设计并进行了功能扩展。该处理器具
有较高的灵活性,可以根据实际应用需求进行数据通路和指令集的扩展。论文按
照自顶向下的设计方法,首先给出了处理器内核的总体结构,在此基础上基于可
扩展的思想完成了地址产生单元、译码模块和流水线控制单元的实现,同时在解
决竞争的过程中验证了这一结构的灵活性。
在完成处理器内核设计的基础上,本文以快速傅利叶变换电路作为扩展单元
对该数字信号处理器进行了功能扩展。之后大规模的功能验证论证了本文提出的
扩展设计的可行性以及扩展单元带来的性能优化效果。测试结果表明,本文设计
的扩展数字信号处理器在执行快速傅利叶变换运算方面具有很高的加速比和并
行度。
本文对数字信号处理器的设计方法进行了有益的尝试与探索,为今后设计性
能更强、结构更灵活的数字信号处理器提供了经验。

关键字:数字信号处理器、可扩展性、计算机体系结构
v
A Design and Extension of Digital Signal Processor Core

Abstract

The endless development of integrated circuits design and manufacture
technology has enabled a wide application of the digital signal processors (DSP) in
communication, computer, control and other fields. Meanwhile, digital signal
processing algorithms are ing more and plicated that it is quite hard
to enhance the performance of the DSP on a certain occasions only through software
optimization. In addition, the petition has placed a higher requirement to
the flexibility and development time of a DSP than before.
This paper has presented the structure, implementation and functional extension
of a digital signal processor core. Extension on the data path and instruction set can be
adopted to this DSP with high flexibility. According to the top down design flow, the
structure of the basic DSP core is displayed, followed by the structure of the address
generation unit, the two-pass decode finite state machine and the pipeline control unit.
The solution to hazards has shown the flexibility of the core.
On the basis of the basic core, an extended DSP core is implemented, which has
used a fast Fourier transform (FFT) as the extended unit. Mass functional verifications
have proved the feasibilit