文档介绍：乾衷交通丈学磺量论文摘要其物理层彝数据链辨层协议进行了分掇。然后,引入sOc的概念,,提出了实现MvB链路屡的网卡设计目标。根据设计目标,将整个控制器系统的开发进行了模块化的分解,然后在对每个子功能模块进行了深入分掇的基础上,采用VefilogHDL硬件描述语言编程,给蹴了爨体IP模块的解决方法,并在成功仿真厝,将这些模块下载至FPGA。接藿,缝合实验塞现鸯豹网终节点瑗境,剃麓掰设诗的总线逶僖控制器,提出将MVB网络应用于连接各功能节点的总线网络方案。并将本设计网卡与Duagon公司的网卡进行了功能等方面的比较。最后,本文提出了gl入Ⅺ0s软孩豹概念,搬窭该网卡中还窍特改进的遣方,难今后的工作进行了展望,并提出了建议。关键词:髓N,鹾vB,总线遥傣控制器,臻核,FPGA北京交通大学硕:}论文ABSIRACTRESEARC珏ANDREALlZA:rIoNoFP薹∞WoRKBOT,I’(woIk)m珏nic礤oⅡne船ork∞%N证dudestwobustypes:悯(wiredTrainBuS)8IldMVB(Multifu珏clionvehicleBus).wTBjn￡e}connectsvehiclesofatrain;MVBinterconnectse耙ctronicequipmentwithinavehicle。,municatiOncontroⅡer(Adaptor)takes如afgcofsi辨al￡fa珏silionofphysicallaycI’perfb棚sthepTotocolOflinklayer,aIldprovides攮esof孵a∞inte瞧ceforCPU;,thedeVelopmentofMVBadapterinOurcountfyisinele玎日0ntaryst鑫ge,paniesinOthefcoun垤ies,this《。jeclofMOR(MinistfyofRailway)一“”.北柬交通丈学碗士论文ABSTRA(XW“hthetechnologydevelopmentofEDAandSOC(SystemOna(、hjp),esmoreandmoreinte掣atin昏m蛆ysimiIarinterfacechipscanbesubstitIltedbylP(IntellectualPropeny)coresofASIC(ApplicationSpecificIntegratedCircuit),—,,andthenanalyzesthephysicallayerandtheprotocolof1inklayeLSecond,byintrOdudngtheconceptionofSOC,accordingtoIEC61375-1,thenlesisgivestheschemeofdesigningMVBad印toLWiththisscheme,r01lcrsystemisdividedintosevoralsub——depttlanalysisOfeVerysub-,essfully,,worksituationOfOllrlab,pfesentstheplanwhichusesMVBtoconnectthenodes,pany-Atlast,byusingthe∞nc印tionofNlDSsofIlPcofe,:TCN,删nicationcontfoHer’IPcore,FPGA北京交通大学硕士论文符号说明符号说明’:’munica撖mNelwOrk,列车遵信网络。WTB:WifedTramBus。绞线式列车总线