文档介绍：Wafer Fabrication
Process
Technology
CMOS
1
Content
CMOS process flow& cross section
CMOS process flocation
Deposit Resist
UV Exposure
Develop Resist
p+ S/D Implant
p+
p+
Remove Resist
Fox
polySi
polySi
n+
n+
13
silicon substrate
p-well
n-well
CMOS
Contacts & Interconnects
Deposit BPTEOS
BPTEOS
BPSG Reflow
Planarization Etchback
Deposit Resist
UV Exposure
Develop Resist
Contact Etchback
Remove Resist
Fox
polySi
polySi
n+
n+
p+
p+
14
silicon substrate
p-well
n-well
CMOS
Contacts & Interconnects
Depost Metal 1
Metal 1
Deposit Resist
UV Exposure
Develop Resist
Etch Metal 1
Remove Resist
Fox
polySi
polySi
p+
p+
n+
n+
BPTEOS
15
silicon substrate
p-well
n-well
CMOS
Contacts & Interconnects
Deposit IMD 1
IMD1
Deposit SOG
SOG
Planarization Etchback
Deposit Resist
UV Exposure
Develop Resist
Via Etch
Remove Resist
Fox
polySi
polySi
p+
p+
Metal 1
n+
n+
BPTEOS
16
silicon substrate
p-well
n-well
CMOS
Contacts & Interconnects
Deposit Metal 2
Metal 2
Metal 2
Deposit Resist
UV Exposure
Develop Resist
Etch Metal 2
Remove Resist
Deposit Passivation
Fox
polySi
polySi
p+
p+
Metal 1
n+
n+
BPTEOS
IMD1
SOG
Passivation
17
Process Cross section
Pad oxide
P Substrate
OD SiN
18
Process Cross section
P Substrate
19
Process Cross section
P Substrate
Pwell mask
Pwell
NAPT
VTN
B11 Pwell/NAPT/VTN Implant
Nwell mask
P31 Nwell/P_APT/VTP Implant
Nwell
PAPT
VTP
20
Process Cross section
P Substrate
Pwell
NAPT
VTN
Nwell
Nfield
PAPT
Mask 132
HF Wet dip and Grow Gate oxide-2
21
Process Cross section
Poly
NLDD
P Substrate
NLDD
Pwell
NAPT
VTN
Nwell
PAPT
VTP
Poly
NLDD implant
NLDD 114 mask
PLDD 113 mask
PLDD implant
22
Process Cross section
Poly
PLDD
PLDD
NLDD
P Substrate
NLDD
Pwell
NAPT
VTN
Nwell
PAPT
VTP
Poly
PLDD 197 mask ( &)
P-pocket/PLDD imp
NLDD 116 mask ()