文档介绍：Freescale Semiconductor Document Number: MC33903_4_5
Technical Data Rev. , 2/2012
SBC Gen2 with CAN High Speed
and LIN Interface 33903/4/533903/
The 33903/4/5 is the second generation family of the System Basis
Chip (SBC). bines several features and enhances present
module designs. The device works as an advanced power SYSTEM BASIS CHIP
management unit for the MCU with additional integrated circuits such
as sensors and CAN transceivers. It has a built-in enhanced high-speed
CAN interface (ISO11898-2 and -5) with local and bus failure
diagnostics, protection, and fail-safe operation modes. The SBC may
include zero, one or two LIN interfaces with LIN output pin switches.
It includes up to four wake-up input pins that can also be configured as
output drivers for flexibility.
This device implements multiple Low-power (LP) modes, with very
low-current consumption. In addition, the device is part of a family EK Suffix (Pb-free) EK Suffix (Pb-free)
concept where patibility adds versatility to module design. 98ASA10556D 98ASA10506D
The 33903/4/5 also implements an innovative and advanced fail-safe 32-PIN SOIC 54-PIN SOIC
state machine and concept solution.
Features
• Voltage regulator for MCU, or V, part number selectable, with
possibility of usage external PNP to extend current capability and
share power dissipation
• Voltage, current, and temperature protection
• Extremely low quiescent current in LP modes
• Fully-protected embedded V regulator for the CAN driver
• Multiple under-voltage detections to address various MCU
specifications and system operation modes (. cranking)
• Auxiliary or V SPI configurable regulator, for additional ICs,
with over-current detection and under-voltage protection
• MUX output pin for device internal analog signal monitoring and
power supply monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins
diagnostics and monitor