CPU实验报告.docx

文档介绍：Bit in read-only
control memory
Micro-operation
Control signal name
(Bit of ROM)
C0
CAR←CAR+1
Increa
C5,C6,C0
00000061
CAR←CAR+1
11
MBR←ACC, CAR←CAR+1,WE=1
C23,C12,C0 00001001
12
memory←MBR, CAR←CAR+1
C11,C0
00000801
13
MAR←PC CAR←0
C10,C2
00000404
，
20
(LOAD)
MAR←MBR7-0,PC← PC+1,
C5,C6,C0
00000061
CAR←CAR+1
21
MBR←memory , CAR← CAR+1
C3,C0
00000009
22
ACC←0, BR ←MBR, CAR← CAR+1
C8,C7,C0
00000181
23
ACC←ACC+BR, CAR←CAR+1
C9,C0
00000201
24
MAR←PC, CAR←0
C10,C2
00000404
30(ADD)
MAR←MBR7-0, PC←PC+1,
C5,C6,C0
00000061
CAR←CAR+1
31
MBR←memory, CAR←CAR+1
C3,C0
00000009
32
BR← MBR, CAR←CAR+1
C7,C0
00000081
33
ACC←ACC+BR, CAR←CAR+1
C9,C0
00000201
34
MAR←PC, CAR←0
C10,C2
00000404
40
(SUB)
MAR←MBR7-0, PC←PC+1,
C5,C6,C0
00000061
CAR←CAR+1
41
MBR←memory, CAR←CAR+1
C3,C0
00000009
42
BR← MBR, CAR←CAR+1
C7,C0
00000081
43
ACC←ACC-BR, CAR←CAR+1
C15,C0
00010001
44
MAR←PC, CAR←0
C10,C2
00000404
50(JUMPEZ)
(IF flag=1) PC ← PC+1, CAR←
C6,C0
00000041
CAR+1
51
CAR←0 ,MAR← PC
52
(IF flag =0) PC ←MBR7-0, CAR
←CAR+1
53
CAR←0 ,MAR← PC
60(JMP)
PC← MBR7-0, CAR←CAR+1
61
CAR←0 ,MAR← PC
7