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学校编码10384200224002UDC厦门大学厦门大学博.pdf

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文档介绍:: .
学校编码:10384 MOS
工艺的芯片电路; ,首次以 的工艺
实现增益高达 46dB,速率为 的限幅放大器,达到 工艺才
厦门大学博硕士论文摘要库能达到的功能; 3. 增加信号丢失检测和自动静噪的功能,实现产品化所
需要的各项功能。

关键词:限幅放大器;扩展带宽;集成电路设计
4ABSTRACT
Limiting amplifier is one of the key parts of optical fiber receiver. At present, most of
the high speed limiting amplifiers used in optical fiber receivers in mainland of
China are imported. So, to design this kind of limiting amplifiers should be of a large
potential market. The purpose of this paper is to design a limiting amplifier
replacing the correspond imported products in the demand of the civil market. The limiting
amplifier not only can be used as the post amplifier of optical fiber receiver, but also can be
used in clock recover circuit of passive filter to restrain the variety of the clock amplitude
which was caused by different input code styles. It also can be employed as input buffer or
output buffer of clock circuit and data processing circuit.
In this paper, we firstly introduce the optical communication system, optical fiber
receiver and the principle of choosing limiting amplifier as the main amplifier of optical
fiber receiver. And then, we analyze the key techniques for bandwidth enhancement of
limiting amplifier. Following that, we design a CMOS circuit of the limiting amplifier and
simulate it with µ CMOS device model. At last, we design its layout with Cadence
EDA tools by using the cell library and design rules which are all in the PDK offered by
foundry. Through the chipset testing , the results show that our limiting amplifier can
replace the same velocity production imported. The innovations in our design are that: 1.