文档介绍：Chapter 6
Integrated CMOS Low-Noise Amplifiers
Introduction
Based on the foregoing theoretical design exploration, several test chips and prototypes have
been implemented in modern mainstream CMOS technologies. All circuits have been foreseen
of ESD-protection. The design, layout and measurement results will be discussed. The first chip
concerns a low-noise amplifier for the L2 GPS band at GHz. It has been implemented in
a µm technology. The circuit was designed as a stand-alone amplifier, matched to 50 Ω at
both input and output. A second low-noise amplifier has been designed and integrated within a
complete GPS receiver front-end. It has been implemented in the same technology. This receiver
focusses on the GHz primary GPS band. The last design which will be discussed targets
5 GHz wireless LAN applications. The circuit features an integrated ESD-inductor.
A dB NF ESD-Protected 9 mW CMOS LNA
The GPS Power Levels
Since two of the presented prototypes aim for application in a GPS receiver, it is useful to quickly
review the signal characteristics of the GPS system. The GPS signal is broadcast at three fre-
quencies: a primary signal at GHz (L1 band), a secondary signal at GHz (L2 band)
and a tertiary signal at GHz (L5 band) which will be introduced by the beginning of
2005. The information transmitted in these bands consists of a continuous 50 bps stream. It
contains data like . the satellite location, the satellite time and the necessary clock correc-
tions. This data is spread to a much larger bandwidth by multiplication with a wide-bandwidth
pseudo-random (PRN) code, commonly known as direct-sequence spread spectrum modulation
(DSSS). In the receiver, thesignalis de-spreadbycorrelatingitwith an identical PRN sequence.
Combining the received satellite data with puted time of arrival then yieldsthe position
information.
At both L1 and L2, three different spreading codes exist:
134 Integr