647-国立交通大学电子工程系 前瞻VLSI元件与技术实验室.ppt

文档介绍：國立交通大學電子工程系前瞻VLSI元件與技術實驗室
世界性頂尖國際學術會議2002 IEEE International Electron Devices Meeting莊紹勳教授研究群第四度入選
本研究群近年發表於 IEDM 之論文:
S. S. Chung, Darren C. Chen, C. T. Cheng, and C. F. Yeh “A physically-based built-in spice poly-si TFT model for circuit simulation and reliability evalution,” in IEDM Tech. Dig., pp.,139-142, San Francisco, CA, Dec. 8-11, 1996.
S. S. Chung, S. N. Kuo, C. M. Yih, and T. S. Chao, “Performance and reliability evaluations of P-channel flash memories with different programming schemes,” in IEDM Tech. Dig., pp., 295-298, Washington, DC., Dec. 7-10, 1997.
S. S. Chung, C. M. Yih, S. S. Wu, H. H. Chen, and G. Hong, “ A patible Flash EEPROM Model Feasile for Transient and Program/Erase Cycling Endurance Simulation,”
in IEDM Tech. Dig., pp., 179-182, Washington, DC., Dec. 5-8, 1999.