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July,2006
MemoryTestingProblem&Solutions
Problem:memorymanufacturingisnotperfect
Needtesting,diagnosis,andrepair
RAMSES:RAM/Flashfaultsimulator
TAGS:RAM/Flashtestalgorithm(pattern)generator
BRAINS:RAMBISTgenerator
FAME:memoryfailureanalyzer
Design
(Layout)
Defect
Injection
FaultyCell
Behavior
Fault
Models
Fault
Models
Test
Algorithms
Built-In
Self-Test
Built-In
Self-Repair
Tester
2
MemoryBISTAutomationFlow
BRAINS:
BISTforRAMsinSeconds
BIST
Intermediate
Description
Simulation/Synthesis/P&RFlow
BRAINS
gbrains
Memory
Library
BIST
Templates
BIDConstructor
CompilerKernel
BISTDesign
ActivationSequences
IntegrationScripts
MemorySpec
TestRequirement
Memory
Compiler
IP
Generators
Command
Scripts
GUI
3
TestScheduleandTestGrouping
Single-port
SRAM
Group0
Controller
Sequencer1
Dual-port
SRAM
Group1
2R1W
RegisterFile
Single-port
SRAM
Readport
Writeport
Read-writeport
Sequencer0
Group0
Parameters:
Memorytype
Memoryspec.
Powerconstraint
Userdefine
4
AlgorithmProgramming&TestScheduling
5
DrivingCapability&PipelineOptimization
6
BISTCircuitGenerationFlow
MemoryInfo.
TestAlgorithm
TestScheduling
Driving/TimingSpec.
BISTCompile
Start
RTL,TB,
Memorymodel,
address,wordwidth
Default/Programmable
Auto/Userdefined
Pinloading,latency
BID
7
BISTArchitecture
Memory
BIST
ExternalTester
MBS
MSI
MBO
MRD
MSO
MBC
MBR
MCK
Controller
RAM
RAM
RAM
RAM
RAM
RAM
Sequencer
Sequencer
Sequencer
TPG
TPG
TPG
TPG
TPG
TPG
8
ExperimentResult&Comparison
MemorySpec:
64X64:2modules
64X128:3modules
512X64:1module
512X128:2modules
Fullspeedtesting--clockrate:100MHz
Diagnosisfunction
Testalgorithm:MarchC-(Mentor),MarchCW(BRAINS)
Testtime
(cycle)
Gatecount
BRAINS
2,423,500
28,910
Mentor
20,080,900
30,353
9
FAME
FAME:FailureAnalyzerforMemories
MECA:MemoryErrorCatcherandAnalyzer
RAMSES:RAMfaultsimulator
TAGS:RAMtestalgorithmgenerator
ERA:RAMerroranalyzer
MDD:MemoryDefectDiagnosisTool
AFA:AutomaticFaultAnalyzer
FPA:Failure/FaultPatternAnalyzer
GUI-basedFailure/FaultPatternViewer
10