文档介绍：毕业设计(论文)
基于VHDL的数码锁的设计
专业: 电子信息工程
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2012年 6 月
摘要
这里阐述了一种基于VHDL 设计一种数字电子数码锁的原理和方法,所用的EDA仿真工具是Quartus II ,该数码锁具有安全性能高、成本低廉、功耗较低、操作简单等优点。
本文介绍的VHDL数码锁应具有如下功能:密码预先存入寄存器中,***时,输入密码存入另一寄存器中,当按下“确定”键时,启动比较器,比较两个寄存器中的内容,当结果相同时***;当结果不同时不***。三次输入错误,则发出报警信号,直到管理员终止此报警信号。用户需要修改密码时,先***,再按“设定密码”,清除预先存入的密码,通过键盘输入新的4位十进制码,按“确定”完成。此锁可设置四位密码,如果不设置密码时,默认为“0000”。
此数码锁有三个电路组成:密码输入电路、数码锁控制电路和密码显示电路,数字密码的显示我们采用LED数码管来实现,相对而言其电路简单,成本低,且具有一定的可靠性。此外,输入采用4*4矩阵式键盘。
关键词:VHDL 数码锁 Quartus II
Abstract
It is elaborated here the principles and methods of a digital electronic lock based on the VHDL, the EDA simulation tool used is the Quartus II, the lock has a high safety performance, low cost, low power consumption for simple operation, etc..
This article describes the VHDL code lock should have the following functions: password pre-stored in another register in the register, unlock, enter the password deposit, when press the "OK" button to start pare two registers when the results were the same to unlock; not unlock when the results. Three input error, the alarm signal is issued until the administrator to terminate the alarm signal. Users need to modify the password, unlock, and then set a password, remove the pre-deposited into the password, enter a new four decimal code via the keyboard, press the "OK" plete. This lock can be set to a four-digit PIN if you do not set a password, default is "0000".
This lock posed of three circuits: the password input circuit, the lock control circuit and password display circuit, digital password LED digital tube is relatively simple circuit, low cost, and reliability. In addition, type 4 * 4 matrix keyboard.
Key words: VHDL digital lock Quartus II
目录
摘要 I
ABSTRACT II
目录 III
第一章引言 1
国内外的研究现状 1
第二章数码锁设计基础 3
设计目标及方案 3
集成电路的设计流程 4
IP核复用技术 6
IP复用技术 7
复杂可编程逻辑器件(CPLD) 7
CPLD的基本特点 7
MAX7000E功能描述 8
硬件描述语言 10
Verilog HDL语言 11
VHDL语言 12
Verilog HDL和VHDL的比