文档介绍：ASICs...THE COURSE (1 WEEK)
TEST 14
Key terms and concepts: production test • wafer test or wafer sort • probe card • production tester
• test program • test response • test vector • final test • goods-inward test • printed-circuit board
(PCB or board) • failure analysis • field repair
The Importance of Test
Key terms and concepts: product quality • defect level • average quality level (AQL)
Defect levels in printed-circuit boards (PCB)
ASIC defect level Defective ASICs Total PCB repair cost
5% 5000 $1million
1% 1000 $200,000
% 100 $20,000
% 10 $2,000
Defect levels in systems
Total repair cost at
ASIC defect level Defective ASICs Defective boards
system level
5% 5000 500 $5million
1% 1000 100 $1million
% 100 10 $100,000
% 10 1 $10,000
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2 SECTION 14 TEST ASICS... THE COURSE
Boundary-Scan Test
Key terms and concepts: 4/5-wire interface for board-level test • Joint Test Action Group (JTAG)
• IEEE Standard Test Port and Boundary-Scan Architecture • boundary-scan test
(BST) • test-data output (TDO) • test-data registers (TDR) • test clock (TCK) • test-mode select
(TMS) • test-reset input signal (TRST*) • test-access port (TAP)
Boundary-scan terminology
Acronym Meaning Explanation
BR Bypass register A TDR, directly connects TDI and TDO, bypassing
BSR
BSC Boundary-scan cell Each I/O pad has a BSC to monitor signals
BSR Boundary-scan register A TDR, a shift register formed from a chain of
BSCs
BST Boundary-scan test Not to be confused with BIST (built-in self-test)
IDCODE Device-identification reg- Optional TDR, contains manufacturer and part
ister number
IR Instruction register Holds a BST instruction, provides control signals
JTAG Joint Test Action Group anization that developed boundary scan
TAP Test-access port Four- (or five-)wire test interface to an ASIC
TCK Test clock A TAP wire, the clock that controls BST operation
TDI Test-data input A TAP wire, the input to the IR a