文档介绍：UM10429
LPC1102 User manual
Rev. 2 — 5 April 2011 User manual
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Keywords ARM Cortex-M0, LPC1102, LPC1102UK
Abstract LPC1102 User manual
NXP Semiconductors UM10429
LPC1102 UM
Revision history
Rev Date Description
2 20110405 LPC1102 User manual
Modifications: • Section “Start-up behavior” added.
• Description of reset sources updated in Section “Reset”.
• Figure 6 “Power profiles pointer structure” added.
• Description of system tick timer updated. Reference clock added as clock source in Table 136 “SysTick
Timer Control and status register (SYST_CSR - 0xE000 E010) bit description”.
• Single cycle hardware multiply specified in Table 236 “Cortex M0- instruction summary”.
• Decription of RESET pin updated in Table 58.
1 20101020 LPC1102 User manual
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User manual Rev. 2 — 5 April 2011 2 of 255
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Chapter 1: LPC1102 Introductory information
Rev. 2 — 5 April 2011 User manual
Introduction
The LPC1102 is an ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit
microcontroller applications, offering performance, low power, simple instruction set and
memory addressing together with reduced code pared to existing 8/16-bit
architectures.
The LPC1102 operates at CPU frequencies of up to 50 MHz.
The plement of the LPC1102 includes 32 kB of flash memory, 8 kB of data
memory, one RS-485/EIA-485 UART, one SPI interface with SSP features, four general
purpose counter/timers, a 10-bit ADC, and 11 general purpose I/O pins.
Features
• System:
– ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
– ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
– Serial Wire Debug.
–