文档介绍：Things You Can Learn From
An IBIS Model
CDNLive 2005 / Silicon Valley
Todd Westerhoff
Cisco Systems, Inc.
RTG-HSD-DAC 2005 © 2005, Cisco Systems, Inc. All rights reserved. 1
IBIS Models
• Normally used only for simulation purposes
- Signal quality analysis –“clean waveforms”
- Flight time analysis – static timing closure
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Things in an IBIS model CDNLive 2005, Silicon Valley © 2005, Cisco Systems, Inc. All rights reserved.
IBIS Models
• Can also be used for design decisions:
- At what length does a PCB trace e “distributed”?
- How strong is the driver?
- What termination scheme / value should be used?
- Should PCB pensate for package skew?
• IBIS models can provide insight into model quality and
simulation results:
- Is the package model good enough?
- What happens if we have poor signal quality at an input
pin?
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Things in an IBIS model CDNLive 2005, Silicon Valley © 2005, Cisco Systems, Inc. All rights reserved.
Distributed Traces – Rule of Thumb
“When the signal rise time is less than 3X
the round-trip delay of the PCB trace, the
trace should be treated as distributed”
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Things in an IBIS model CDNLive 2005, Silicon Valley © 2005, Cisco Systems, Inc. All rights reserved.
Rise/Fall Times and IBIS Models
The IBIS model lists rise/fall time data for
each buffer in the model
[Model] LVTTL16F
Model_type I/O
Polarity Non-Inverting
Enable Active-Low The [Ramp] keyword
. in an IBIS model lists
.
. the 20-80% rise and
[Ramp] fall times for the buffer
| variable typ min max
dV/dt_r
dV/dt_f
R_load = In this case, the
rise/fall time is
IBIS Model File approximately 450 ps
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Things in an IBIS model CDNLive 2005, Silicon Valley © 2005, Cisco Systems, Inc. All rights reserved.
Case Study –“Distributed” Rule of Thumb
16mA driver used to
induce overshoot
• Circuit is analyzed at
125 MHz
• Typical