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doi:103969 / j issn1003353x2010 z1015
高压VDMOS 结终端技术研究
胡佳贤,韩雁,张世峰,张斌,韩成功
(浙江大学微电子与光电子研究所,杭州310027)
摘要:功率VDMOSFET 由于其优异特性而被广泛地应用于开关电源、汽车电子等领域,是
功率器件的主流产品之一。功率VDMOS 器件由于终端pn 结的曲率效应,其高压阻断能力受到限
制,为了提高高压阻断能力,结终端技术被广泛采用,是现代功率器件的关键技术之一。首先简
要介绍了各种VDMOS 结终端技术及其最新研究和发展,然后介绍了自行研制的拟量产的200 V /
40 A、特征导通电阻12 Ω·mm2 、带ESD 防护的VDMOS 晶体管的终端结构的理论设计、仿真结
果及实际流片测试结果;器件采用17 μm,5 Ω·mm2 外延层进行流片,测试结果表明耐压达到
215 V以上,说明了终端结构的设计是成功的。
关键词:VDMOS;结终端;场限环;场板;导通电阻
中图分类号:TN432 文献标识码:A 文章编号:1003353X (2010)增刊005203
Research on Junction Termination Technique for VDMOSFET
Hu Jiaxian,Han Yan,Zhang Shifeng,Zhang Bin,Han Chenggong
(Institute of Microelectronics and Optoelectronics, Zhejiang University, Hangzhou 310027, China)
Abstract:Power VDMOS is widely used due to its excellent activities in areas such as switching power
supply,and has been one of the mainstream power devices . Because of the terminal pn junctions curvature
effect,VDMOSs blocking voltage is limited . In order to get high blocking voltage, junction termination
technique was used . Firstly, varieties of junction termination structures and their latest research and
development are introduced briefly,then the termination structures theoretical desigh and test result of self
2
developed 200 V / 40 A VDMOS are presenfed, whose R on is 1 2 Ω·mm and involves ESD protectio