文档介绍：A Dissertation Submitted to Shanghai Jiao Tong University for Master
Degree of Engineering
Lithography Process Optimization for Eliminating the
Surface Static Electricity of Trench MOS
Author:Zhongfei Shan
Specialty: Integrated Circuit Engineering
Advisor: Guoguang Rong
Corporation Advisor: Qunqi Chen
School of Microelectronics
Shanghai Jiao Tong University
Shanghai,
April 2010
I
消除 Trench MOS 表面静电的光刻工艺改进
摘要
在多种多样的功率器件中,Trench MOSFET(一种新型垂直结构器
件)是一种拥有低导通电阻、低栅漏电荷密度、以及低开关损耗的高速
开关元器件。而拥有特殊工艺结构的某Trench MOS产品A通过增大gate
导线面积,进一步减小导通电阻、降低开关功耗并提高开关速度。但常
规的半导体工艺不能满足该新型Trench MOS产品A的目标良率,阻碍了
其广泛应用。本项目针对该产品的低良率(low yield)问题进行光刻工艺
的改进来提高它的良率。通过一系列实验,对某Trench MOS产品A工艺
产生low yield的机理进行分析,特别对影响光刻显影工艺的参数进行分
析。通过合理设计实验来验证减少显影工艺超纯水的喷吐时间可以提高
良率,并评估了其对显影工艺的影响,得出采用此工艺的可行性论证。
然后将显影工艺中减少超纯水喷吐时间的技术运用到实际生产当中,通
过大规模生产得出的生产结果数据来评估这一工艺改进的效果。研究结
果表明,这种方法可以消除P阱光刻工艺中显影后积累在晶圆表面的静电
电荷,减少其对P阱离子注入均匀性的影响,消除阈值电压VTH漂移,提
高良率到目标值,此外这种方法还可以提高产品的通量(throughput)。
IV
关键词:Trench MOSFET, 光刻工艺, 静电电荷, 良率, 显影工艺, 超
纯水, 阈值电压漂移.
V
Lithography Process Optimization for Eliminating the Surface Static
Electricity of Trench MOS
ABSTRACT
Among many kinds of power MOSFETs, Trench MOSFET has lower
turn-on resistance, small gate-drain charge density, low conduction
resistance and switching losses, and faster switching speed. A special trench
MOS structure named “product-A” structure, that has increased gate wire
area, can further reduce resistance and power consumption, and increase
switching speed. However, the conventional process technology can not
meet the yield requirement of this novel Trench MOS product A. This work
is focused on lithography process improvement for increasing Trench MOS
product-A yield. This project analyzes the low yield mechanism of
product-A through a series of experiments, especial