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Toshiba semiconductor reliability handbook IC 4.pdf

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Toshiba semiconductor reliability handbook IC 4.pdf

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Toshiba semiconductor reliability handbook IC 4.pdf

文档介绍

文档介绍:[4] Failure Analysis and Product Improvemnt
1. Overview
As described in previous chapters, the causes and mechanisms of semiconductor device failures are
affected by various factors and are therefore plicated. Toshiba enforces strict quality control in
its semiconductor manufacturing processes based prehensive analysis of the factors affecting
reliability as well as the problems that occur in the manufacturing process and after products have
shipped. Although it is impossible pletely eliminate all failures, when a failure does occur,
expeditious failure analysis is quickly used to identify the source of the problem and proper action is
taken.
Some failures occur in the manufacturing process, others are detected in the inspection process, and
many others occur with the passage of time in the field. Failure analysis is performed in all of these
cases.
In addition to identifying the cause of failures and analyzing failure mechanisms, failure analysis also
involves various chemical and physical techniques for extracting and controlling parameters affecting
reliability, beginning with the earliest stages of the manufacturing process. The results are applied to
the determination of process conditions and the development of process control technology. Thus
failure analysis has e an important part of semiconductor manufacturing technology.
To correctly identify the causes and mechanisms of failures, various analytical instruments must be
used according to prescribed analysis procedures. Therefore, failure analysis requires an analytical
expertise based on a knowledge of chemistry and physics as well as an understanding of the physical
characteristics of semiconductors.
When performing failure analysis, the following points must always be considered:
(1) What are the symptoms of the failure, when and where did they appear, and is the failure
repeatable? (Failure Mode)
(2) Where is the failure located in t