文档介绍：VHDL
Coding and Logic Synthesis
with Synopsys|
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VHDL
Coding and Logic Synthesis
with Synopsys|
Weng Fook Lee
Advanced Micro Devices, Inc.
ACADEMIC PRESS
A Harcourt Science and pany
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Copyright
9 2000 by Academic Press
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Printed in the United States of America
00 01 02 03 04 05 MB 9 8 7 6 5 4 3 2 1
Dedicated to my late father,
the greatest man I have ever known.
TABLE OF CONTENTS
List of Figures xi
List of Tables xv
oo
List of Examples XVII
Preface xix
Acknowledgment xxiii
Trademarks xxiv
VHDL CODING
I Introduction 3
Conventional Design- Schematic Capture 3
Hardware Description Language 4
VHDL Design Structure 4
Instantiation Within a VHDL Design Structure 8
Structural, Behavioral, and Synthesizable VHDL Design Structure 10
StructuraI VHDL 11
Behavioral VHDL 12
RTL Code 15
Usage of Library Declarations in VHDL Design Structure 17
2 VHDL Simulation and Synthesis Flow 19
3 Synthesizable Code for Basic ponents 21
AND Logic 21
OR Logic 22
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viii TABLE OF CONTENTS