文档介绍：MOBK089-FM MOBKXXX- October 26, 2007 10:29
Chip Multiprocessor Architecture:
Techniques to Improve
Throughput and Latency
i
MOBK089-FM MOBKXXX- October 26, 2007 10:29
Copyright © 2007 by Morgan & Claypool
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in
any form or by any means—electronic, mechanical, photocopy, recording, or any other except for brief quotations
in printed reviews, without the prior permission of the publisher.
Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency
Kunle Olukotun, Lance Hammond, and James Laudon
ISBN: 159829122X paperback
ISBN: 9781598291223 paperback
ISBN: 1598291238 ebook
ISBN: 9781598291230 ebook
DOI:
A Publication in the Morgan & Claypool Publishers series
SYNTHESIS LECTURES PUTER ARCHITECTURE #3
Lecture #3
Series Editor: Mark D. Hill, University of Wisconsin
Library of Congress Cataloging-in-Publication Data
Series ISSN: 1935-3235 print
Series ISSN: 1935-3243 electronic
First Edition
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MOBK089-FM MOBKXXX- November 2, 2007 2:38
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Synthesis Lectures puter
Architecture
Editor
Mark D. Hill, University of Wisconsin, Madison
Synthesis Lectures puter Architecture publishes 50- to 150 page publications on topics
pertaining to the science and art of designing, analyzing, selecting and interconnecting hardware
components to puters that meet functional, performance and cost goals.
Chip Mutiprocessor Architecture: Techniques to Improve Throughput and Latency
Kunle Olukotun, Lance Hammond, James Laudon
2007
Transactional Memory
James R. Larus, Ravi Rajwar
2007
puting puter Architects
Tzvetan S. Metodi, Frederic T. Chong
2006
MOBK089-FM MOBKXXX- October 26, 2007 10:29
Chip Multiprocessor Architecture:
Techniques to Improve
Throughput and Latency
Kunle Olukotun
Stanf