文档介绍：White Paper
Creating a Third Generation I/O Interconnect
AJAY V. BHATT, TECHNOLOGY AND RESEARCH LABS, INTEL CORPORATION
SUMMARY
This paper looks at the ess of the widely adopted PCI bus and describes a higher
performance third generation I/O interconnect, 3GIO, that will serve as a general purpose
I/O interconnect for a wide variety of puting munications platforms. Key
PCI attributes, such as its usage model and software interfaces are maintained whereas its
bandwidth-limiting, parallel bus implementation is replaced by a long-life, fully-serial interface.
A split-transaction protocol is implemented with attributed packets that are prioritized and
optimally delivered to their target. The 3GIO definition prehend various form factors
to support smooth integration with PCI and to enable new system form factors. 3GIO will
provide industry leading performance and price/performance.
Introduction
The PCI bus has served us well for the last 10 years and it will play a major role in the next few
years. However, today’s and tomorrow’s processors and I/O devices are demanding much higher I/O
bandwidth than PCI or PCI-X can deliver and it is time to engineer a new generation of PCI to
serve as a standard I/O bus for future generation platforms. There have been several efforts to
create higher bandwidth buses and this has
resulted in the PC platform supporting a var