文档介绍：STELLARIS ERRATA
Stellaris® LM3S1850 RevA2 Errata
This document contains known errata at the time of publication for the Stellaris LM3S1850
microcontroller. The table below summarizes the errata and lists the affected revisions. See the
data sheet for more details.
See also the ARM® Cortex™-M3 errata, ARM publication number PR326-PRDC-009450 .
Table 1. Revision History
Date Revision Description
August 2011 ■ Added issue “Standard R-work cannot be used on RST to extend POR timing” on page 5.
■ Clarified issue “General-purpose timer 16-bit Edge Count or Edge Time mode does not load reload
value” on page 8 to include Edge-Time mode.
September 2010 ■ Added issue “Hibernation module does not operate correctly” on page 6, replacing previous
Hibernation module errata items.
■ Minor edits and clarifications.
July 2010 ■ Added issue “The RTRIS bit in the UARTRIS register is only set when the interrupt is
enabled” on page 9.
June 2010 ■ Added issue “External reset does not reset the XTAL to PLL Translation (PLLCFG)
register” on page 5.
May 2010 ■ Removed issue "Hibernation Module -MHz oscillator supports a limited range of crystal
load capacitance values" as it does not apply to this part.
■ Minor edits and clarifications.
April 2010 ■ Removed issue "Writes to Hibernation module registers sometimes fail" as it does not apply to this
part.
■ Added issue "Hibernation Module -MHz oscillator supports a limited range of crystal load
capacitance values."
■ Minor edits and clarifications.
April 2010 ■ Removed issue "Setting Bit 7 in I2C Master Timer Period (I2CMTPR) register may have unexpected
results". The data sheet description has changed such that this is no longer necessary.
■ Minor edits and clarifications.
February 2010 ■ Added issue “The General-Purpose Timer match register does not function correctly in 32-bit
mode” on page 8.
■ Added issue "Setting Bit 7 in I2C