文档介绍：'~ Computer Graphics, Volume 21, Number 4, July 1987
A Parallel Processor Architecture for Graphics Arithmetic Operations
John G.
Raster Technologies, Inc.
Two Robbins Road
Westford, Mass. 01886
INTRODUCTION
ABSTRACT
Multiprocessor architectures have been used for sev-
Interactive 3D graphics applications require significant eral years to meet the putational re-
arithmetic processing to plex models, par- quirements of interactive 3D graphics. Simple graph-
ticularly if realistic rendering techniques are used. ics operations such as 3D wireframe manipulation can
Current semiconductor technology cannot provide the easily be divided into a sequence of pipelined opera-
necessary performance without some form of multi- tions. If independent processors are used to handle
processing. these operations, very high performance can be at-
tained [Clark 1982]. However, plex opera-
This paper describes a graphics processor architecture tions such as surface tesselation and lighting calcula-
which can be configured with an arbitrary number of tions can not easily be handled by a highly pipelined
identical processors operating in parallel. Each of the architecture because of the difficulty in reconfiguring
parallel processors can be programmed identically as if the pipeline to execute a wide variety of different
it were a single processor system