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Design of a Low-Power Digital Core for Passive UHF RFID Transponder.pdf

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Design of a Low-Power Digital Core for Passive UHF RFID Transponder.pdf

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Design of a Low-Power Digital Core for Passive UHF RFID Transponder.pdf

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文档介绍:Design of a Low-Power Digital Core for Passive UHF RFID Transponder
Andrea i, Matteo Grisanti, Ilaria De Munari and Paolo Ciapolini
Department of Information Engineering, University of Parma
Parco Area delle Scienze, 181/A Parma, Italy
andrea.******@
Abstract Vdrop
Idigital
Vrect
Recently RFID (Radio-Frequency IDentification)sys- Voltage
C
Rectifier Regulator
tems have gained popularity in manufacturing units, inven- Vreg
tory, logistics, as they represent an inexpensive and reli- Vant
dumping Digital
able solution for automatic identification. RFID tags are capacitor Core
expected to e a key element in the future ubiquitous Vreg Oscillator
computing scenario. Low-cost passive (. featuring no
batteries) tags are supposed to play a major role in this ASK Demodulator
context. UHF tags, in particular, allow for extended read Backscatter Mod.
ranges. Performance of such devices, however, is limited
by the available power, extracted from the ing radia- Figure 1. Passive tag block diagram
tion. In this paper, the design of a novel circuit is presented,
which implements the digital controller of a UHF-RFID
tag pliance with the ISO 18000-6B protocol. Power-
scenario and thus deserve some design technique to be en-
saving strategies are devised, both at the system and the
visaged to optimize their performance.
circuit levels