文档介绍：英文原文12-BitA/plete12-bitA/essiveapproximationanalog-to--BitA-to-mandedtoinitiateaconversion(asdescribedlater),essiveapproximationregister(SAR),,timedbytheclock,willsequencethroughtheconversioncycleandreturnanend-of-,bringtheoutputstatusflaglow,,theinternal12-bitcurrentoutputDACissequencedbytheSARfromthemostsignificantbit(MSB)toleastsignificantbit(LSB)uratelybalancestheinputsignalcurrentthroughthe5kΩ(or10kΩ)-urrentsumtobegreaterorlessthantheinputcurrent;ifthesumisless,thebitislefton;ifmore,,theSARcontainsa12-uratelyrepresentstheinputsignaltowithin1/±%;()andbipolaroffsetresistor(1mA)whentheAD574Aispoweredfrom±±12Vsupplies,orifexternalcurrentmustbesuppliedoverthefulltemperaturerange,-filmapplicationresistorsaretrimmedtomatchthefull-–AD574AInterfaceTheoutputimpedanceofanopamphasanopen-loopvaluewhich,inaclosedloop,,monitortheAD574’sinput