文档介绍：-grainmultithreadingSuperscalar,:,(reuse)--:Intel’sHyper-Threading(2-waySMT)pute--3SMT-pileroptimizationsareusuallygreatlyinfluencedbyspecificassumptionsaboutthetargetmicro--threadedsuperscalar/VLIWandshared-memorymutiprocessorsmayhavetobeapplieddifferentlyormaynotbeappropriatewhentargetingSMTprocessorsdueto:Thefine-grainsharingofprocessorresources(functionalunits,TLB,cacheetc.)-3(“pilerOptimizationsforSimultaneousMultithreading”,,December1997,pages114-124)pileroptimizationstoSMTarchitectures:Loop--3BenchmarksUsedMemoryHierarchyParametersWhenthereisachoiceofvalues,thefirst(themoreaggressive)’smemorysubsystemsandisusedtoemulatelargerdatasetsizes;:"pilerOptimizationsforSimultaneousMultithreading",,,pages114-124SMT-3SMTMicroarchitectureLD=LoopDistributionSSE=SpeculativeSoftwareExecutionT=Tiling8-instructionwidewith8threadsInstructionFetchPolicy:Everycyclefourinstructionsfetchedeachfromtwothreadswi