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A: Fundamentals of Single-chip puter
The single-chip puter is the culmination of both the development of the puter and the integrated circuit arguably the tow most significant inventions of the 20th century [1].
These tow types of architecture are found in single-chip puter. Some employ the split program/data memory of the Harvard architecture, shown in -5A-1, others follow the philosophy, widely adapted for general-puters and microprocessors, of making no logical distinction between program and data memory as in the Princeton architecture, shown in -5A-2.
In general terms a single-chip puter is characterized by the incorporation of all the units of puter into a single device, as shown in Fig3-5A-3.
Program
memory
Input&
Output
unit
CPU
Data
memory
-5A-1 A Harvard type
Input&
Output
unit
CPU
memory
-5A-2. A conventional puter
Timer/
Counter
System
clock
External
Timing
components
Serial I/O
ROM
Reset
Prarallel
I/O
RAM
Interrupts
CPU
Power
Fig3-5A-3. Principal features of a puter
Read only memory (ROM).ROM is usually for the permanent, non-volatile storage of an applications program .Many puters and microcontrollers are intended for high-volume applications and hence the economical manufacture of the devices requires that the contents of the program memory mitted permanently during the manufacture of chips . Clearly, this implies a rigorous approach to ROM code development since changes cannot be made after manufacture .This development process may involve emulation using a sophisticated development system with a hardware emulation capability as well as the use of powerful software tools.
Some manufacturers provide additional ROM options by including in their range devices with (or intended for use with) user programmable memory. The simplest of these is usually device which can operate in a microprocessor mode by using some of the input/output lines as an address and data bus