文档介绍：UNIVERSITY OF MINNESOTA
This is to certify that I have examined this copy of a doctoral thesis by
Tong Zhang
and have found that it plete and satisfactory in all respects,
and that any and all revisions required by the final
mittee have been made.
Keshab K. Parhi
Name of Faculty Advisor
Signature of Faculty Advisor
Date
GRADUATE SCHOOL
Efficient VLSI Architectures for Error-Correcting Coding
A THESIS
SUBMITTED TO THE FACULTY OF THE GRADUATE SCHOOL
OF THE UNIVERSITY OF MINNESOTA
BY
Tong Zhang
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF
DOCTOR OF PHILOSOPHY
Keshab K. Parhi, Advisor
July 2002
°c Tong Zhang 2002
Acknowledgments
First of all, I wish to thank my advisor, Professor Keshab K. Parhi, for his guidance
and support through all stages of my studies and research at the University of Minnesota.
I am very grateful for his recognition, his inspiration, and the exposure and opportunities
that I have received during the course of my study.
I also would like to thank Professor ios Giannakis, Professor Mos Kaveh, Pro-
fessor Pen-Chung Yew, Professor John Kieffer, Professor Larry Kinney for their support
as members of my . committee.
I would like to express my thanks to the Army Research Office (grant numbers
DA/DAAG55-98-1-0315 and DA/DAAD19-01-1-0705) for supporting this research.
My thanks also go to the members of our group, particularly, Zhongfeng Wang, Zhipei
Chi, Leilei Song and Jun Jin Kong for many useful discussions during the course of the
work.
This thesis is dedicated to my wonderful family. I am forever grateful to my parents,
my parents-in-law, my wife, and my brothers for their love, support, and encouragement.
I shall not try to put my appreciation and love for them into words.
i
Abstract
This thesis is devoted to several efficient VLSI architecture design issues in error-
correcting coding, including finite field arithmetic, (Generalized) Low-Density Parity-
Check (LDPC) cod