文档介绍：74AC11004
HEX INVERTER
SCAS033B – JANUARY 1988 – REVISED APRIL 1996
D Flow-Through Architecture Optimizes DB, DW, OR N PACKAGE
PCB Layout (TOP VIEW)
D Center-Pin V and GND Configuration
CC 1 20 1A
Minimizes High-Speed Switching Noise 1Y
2Y 2 19 2A
D
EPIC (Enhanced-Performance Implanted 3Y 3 18 3A
CMOS) 1-µm Process
GND 4 17 NC
D
500-mA Typical Latch-Up Immunity at GND 5 16 VCC
°
125 C GND 6 15 VCC
D Package Options Include Plastic GND 7 14 NC
Small-Outline (DW) and Shrink 4Y 8 13 4A
Small-Outline (DB) Packages, and Standard 5Y 9 12 5A
Plastic 300-mil DIPs (N) 6Y 10 11 6A
description NC – No internal connection
This device contains six independent inverters. It performs the Boolean function Y = A.
The 74AC11004 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT OUTPUT
A Y
H L
L H
logic symbol†
20 1
1A 1 1Y
19 2
2A 2Y
18 3
3A 3Y
13 8
4A 4Y
12 9
5A 5Y
11 10
6A 6Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Copyright 1996, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1
74AC11004
HEX INVERTER
SCAS033B – JANUARY 1988 – REVISED APRIL 1996
logic diagram (positive logic)
20 1
1A 1Y
19 2
2A 2Y
18 3
3A 3Y
13 8
4A 4Y
12 9
5A 5Y
11 10
6A 6Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†