文档介绍：Microelectronics Reliability xxx (2010) xxx–xxx
Contents lists available at ScienceDirect
Microelectronics Reliability
journal homepage: ate/microrel
Evaluation of the ESD performance of local protections based on SCR or bi-SCR
with dynamic or static trigger circuit in 32 nm
J. Bourgeat a,b,c,*, C. Entringer a, P. Galy a, M. Bafleur b,c, D. Marin-Cudraz a
a STMicroelectronics, 850, rue Jean , F-38926 Crolles cedex, France
RS, LAAS, 7 avenue du colonel Roche, F-31077 Toulouse, France
c Université de Toulouse, UPS, INSA, INP, ISAE, LAAS, F-31077 Toulouse, France
article info abstract
Article history: The reliability of electronic devices against electrostatic discharge stresses is still a severe challenge, par-
Available online xxxx ticularly for deep sub-micron technologies such as the CMOS 32 nm in this work. The paper presents a
comparison between four ESD protections in CMOS 32 nm node. Dynamic and static triggering circuits
are investigated and SCR and bi-SCR pared. Each structure is characterized through TLP and
protects up to 2 kV HBM stresses.
Ó 2010 Elsevier Ltd. All rights reserved.
1. Introduction and a symmetrical bi-SCR [11–13] as described in Fig. 4. The two
structures are designed within the same footprint area. Two differ-
During its lifetime, an integrated circuit (IC) is likely to undergo ent triggering circuits are used, a dynamic one