文档介绍：陈烁毕业设计
32位不恢复替代算法除法器设计
摘要
CPU的核心功能之一是实现基本算术运算。在四则基本运算中,除法在技术实现上具有较高的复杂性,所以硬件除法器的设计一般会成为CPU设计中的重点与难点。对于嵌入式CPU来说,其设计目标更加关心成本的降低,使得其算术运算单元在性能设计指标上需要有较大的灵活性,从而使硬件占用较小的面积。
本文根据不恢复替代算法,实现了32位不恢复替代算法除法器。本文首先介绍了除法器在CPU设计中的地位、设计所面临的挑战。然后简单说明了Digit Recurrence算法基本理论和除法器的基本算法,即:恢复迭代算法及其电路、不恢复迭代算法及其电路、基数-4SRT算法、Newton-Raphson除法算法。然后用半定制方法对32不恢复替代算法除法器器进行了设计和分析。最后进行了硬件电路的综合。综合结果表明,无论从资源占用方面还是从最高工作频率方面。基于ALTERA Stratix II 的综合结果显示,基于掩码的数据反转的桶形移位器的最高工作频率可以达到30MHz。
关键词:除法器;不恢复替代算法;半定制设计;Verilog HDL
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Design of 32-bits Not Resume Alternative
Algorithm Divider
Abstract
putation is a key function of Central Processor Unit (CPU).Among basic arithmetic operation, division is the most difficult one to implement. Therefore the design of dedicate hardware divider is usually the vital part in CPU development. Since the design of an embedded CPU is more concerned about cost reduction, its ALU design usually emphasizes on flexibility rather than performance. This orientation demands solutions that consume minimum die area.
This article does not resume under an alternative method to achieve a 32-bit replacement algorithm does not restore divider. This paper introduces the divider position in the CPU design, design challenges and research significance. Then a brief description of the basic theory and algorithm Digit Recurrence divider the basic algorithm, that is: restore iterative algorithm and its circuit, not to resume iterative algorithm and its circuit, the base -4 SRT algorithm, Newton-Raphson division algorithm. Then the paper designs and analyses The Divider in the semi- custom approach. Finally, pleted to integrate the circuit hardware .The result of systhesis based on the ALTERA Stratix II indicates that the mask-based data- reversal barrel shifter can work in the 30MHz.
Keywords: Divider;Not Resume Alternative Algorithm;Semi-custom Approach;Verilog HDL
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