文档介绍：该【altiumdesigner学习笔记（AltiumDesigner学习笔记） 】是由【蓝天】上传分享，文档一共【13】页，该文档可以免费在线阅读，需要了解更多关于【altiumdesigner学习笔记（AltiumDesigner学习笔记） 】的内容，可以使用淘豆网的站内搜索功能，选择自己适合的文档，以下文字是截取该文章内的部分文字，如需要获得完整电子版，请下载此文档到您的设备，方便您编辑和打印。altiumdesigner学****笔记(AltiumDesigner学****笔记)AltiumDesigner学****笔t己关键词:Altium目录第一次学****概述 1第二次学****电子设计基础(上) 第三次学****电子设计基础(下) 第四次学****原理图设计(上) 3第五次学****原理图设计(中) 3第六次学****原理图设计(下) 5第七次学****PCB设计制作(上) 6第八次学****PCB设计制作(中) 7第九次学****PCB设计制作(下) 8第一次学****概述lo面板(面板)的概念、打开、关闭、锁定(PIN)与浮动(浮动)、合并、移动、弹出缩回速度设置、透明度设置2o快捷键捷径,知识中心的使用3-文档标签切换(Ctrl+Tab),文档打开(开)、关闭(关闭)、隐藏(HID)、分割(分裂)、合并(合并)、新窗口打开(在新窗口中打开)4研究软件自带的演示例子referencedesigns和例子。第二次学****电子设计基础(上)1、PCB印刷电路板。完成加工一个双层板一般需要5-10天。2oEDA设计流程:原理图设计-〉(网络报表生成)-〉印制板设计。3oPCB板的总体设计流程:原理图设计-〉(原理图仿真)->网络报表->印制板设计->(信号完整性分析)->文件存储及打印。高速板要考虑的因素更多。4oThegeneralprincipleofflowchartdesign:starttosettheprincipletosetthedrawingeditorworkingenvironment,ponentplacementandloadingelementlayout,principlediagram,wiringprinciplediagram,workreportreportgeneration),filestorageandprintPCBdesignprocess:starttosetuptheworkingenvironment,workreportsetPCBdesignrules,ponentsandlayout,wiring,thedesignrulesofinspection,reportgeneration,(1998,International):porediameter(),XianKuan(),platethickness(40)andporedensity(55).Domestic:maximum24layers,maximumsize500*860,(outerlayer),/(innerlayer),,(throughhole),/(elementhole).oncepts:layer(layer)andthroughhole(via),screenlayer(overlay,Jianfengchazhen,principle:beautifulappearance,noambiguity),fillarea(fill)andgridfillingarea(externalplane),pad(PAD),allkindsoffilm(mask),,IPC-STD-,multipliedbythelinewidthiscross-:anti-,(next)powercorddesign:choosetherightpower:trytowidenthepowerline:ensurethepowerlineanddatatransmissiondirection;useanti-ponents:powerinletaddpull-::asfaraspossibletheuseofsinglepointgrounding:trytowidenthegroundline:thesensitivecircuitisconnectedtoastablegroundreferencesource:onthePCBpartition,separatehighandlowfrequency::parallelsignallinesdonothavetoolong:crystaloscillatorandclockinputtoclose,ponentsaroundthecoredevice,reducethewirelength;layout::denoising,:doornotidlevacant:adapttocrystalshelltotheground;the10drivecircuitasclosetotheedgeofthePCBsignal:donotformaloop::the10Kresistoronthebuspulluphelpsantiinterference:thewiringbetweenthetwolayersisasverticalaspossible:ponents:thebusisasshortaspossible:theCMOSdoesnotusethepinstoprocessfocusonEMC(patibility).<3~6timesthesignaltransmissiontime,itisconsideredhigh-(Part1)workflow:designconcept:(AltiumDesigner,project).Typeofproject:PCBproject(producingsomecolumndocumentsrequiredbyPCB),FPGAproject,embeddedproject,softcoreproject,integrationlibraryproject,(projectpanel).Theprojectdocumentstatus(open,hidden,open/modified,modified),change,addorremovefilestotheproject).Settheprojectoption(options).theconceptofworkingspace(workspace).,moveleftandright,(documentoptions):a)rightclickdocumentoptionsdocumentoptions:b)design=(grid),visualizationgrid;thebackgroundcolorofthedocument,WorkbookWorkbooksize:color:documentinformationbar:parametersettings:(parameters)units(Imperialmilandinternationalmm),,thecursor90degrees,',to,defaults,(middle):-"integratedlibrary”.Miscellaneous(multiple,miscellaneous)devices/),youcanbrowse,butattheslowest,withoutpurpose:apartofaknownnameorname,usingafilter,.)-clickinthelibrary,place,part,shortcut,P,toolbarshortcuts,icons,etc..+spaceswitchingmodeat90,45degrees,:move(selectdirectdrag),theconnectionwillbreak:drag(ctrl+drag),dragshift+mouse,ctrl+C,andthenctrl+V:duplicate:?.,double-(anothermethod:toolbarshortcuticon),compile,:Mformove/drag;place-directivesplacedparameterset,,(convertspecialstring),thebuilt-=text,P=,andplacethetextbox(text,frame).Tools(drawing).!,(find).Ctrl++,,-,bird,'(next))selectthedevice-rightarrow-find,similar,))shift+F.(E),allobjectsthatsatisfytheconditionarehighlightedandothersareblinded,(removeclearfromlowerrightcorner.).Thenselect,all,orctrl+AcanbechangedthroughtheSCHinspector!tools=,number,=',rightclick,,-')tileflat,(b),morestructured,,placesheetentry,payattentiontoinputandoutput,,:selectatop-levelmodule,right-clicksheetsymbol,actions,create,sheet,design,create,sheet,=synchronizesheet,entries,and,Ports,,itmustbesynchronized,-...Tocreatethetop-levelmodule,youonlyneedtoconnecttheportsofthesemodules,,(a))screenshots,)file=:,PCBdesignandproduction(Partone),,warningsshouldbeexcluded,(warningsanderrorscanbesetbythemselves).:createanemptyPCBfile;(underthefilepanel)buildaPCBfilefromthetemplate:usethePCBboardWizard(PCBboardwizard).TheprinciplediagramintoPCBfileto.