文档介绍：The cache, a high-speed buffer establishing a storage hierarchy in the
Model 85, is discussed in depth in this part, since it represents the
anizational departure from other SYSTEM/~puters.
Discussed anization and operation of the cache, including the
mechanisms used to locate and retrieve data needed by the processor.
The internal performance studies that led to use of the cache are de-
scribed, and simulated performance of the chosen configuration is
compared with that of a theoretical system having an entire 80-nano-
second main storage. Finally, the effects of varying cache parameters
are discussed and tabulated.
Structural aspects of the System/360 Model 85
11 Thecache
by J. S. Liptay
Among the objectives of the Model 85 is that of providinga
SYSTEM/^^ compatible processor with both high performance and
high throughput. One of the importantingredients of high through-
put is a large main storage capacity (see the panying article
in Part I). However, it is not feasible to provide a large main stor-
age with an access mensurate with the 80-nanosecond
processor cycle of the Model 85. A longer access time can be par-
pensated for by anincrease in overlap, greaterbuffering,
deeper storage interleaving, more sophistication inthe handling of
branches, and other improvements in the processor. All of these
factors only pensate forth