低压低功耗CMOS rail-to-rail运算放大器设计研究.pdf

文档介绍：西安电子科技大学
硕士学位论文
低压低功耗CMOS rail-to-rail运算放大器设计研究
姓名:翟艳
申请学位级别:硕士
专业:微电子学与固体电子学
指导教师:杨银堂
20050101
摘要
摘要
低压低功耗设计是集成电路设计的主要研究课题之一,本文在研究低压
rail-to-rail 运算放大器的设计方法基础上,设计实现了一种高增益恒跨导的 CMOS
rail-to-rail 运算放大器。运放采用两级结构,输入级由带有一倍电流镜跨导控制电
路的互补差分输入对实现,并由两个低压共源共栅电流镜完成差分输入到单端输
出的转换,具有面积小、噪声低的特点。输出级由带有浮地前馈 AB 类控制的推挽
输出电路实现,可以提高电源效率和减小失真。文中分析了影响运算放大器性能
的主要原因,将输入级偏置在弱反型区来降低电源电压,优化器件参数降低失调
和噪声。采用 TSMC µm CMOS 工艺参数和 BSIM3V3 Spice 模型,用 Hspice
对电路进行了模拟仿真。最后采用 TSMC µm DP5M CMOS 工艺对电路进行了
版图设计,整个运放的版图面积为 380×125µm2。模拟结果表明:运放的电源电压
低达 ,输入输出都达到全摆幅,增益和共模抑制比分别高达 116dB 和 121dB,
超过了同类型的 rail-to-rail 运算放大器 MAX8291 的增益和共模抑制比。

关键词: 低压低功耗 CMOS 恒跨导 rail-to-rail 运算放大器
Abstract
Abstract
The design of low-voltage and low-power circuits is one of most timely subjects in
IC design. A two-stage, high-gain CMOS rail-to-rail operational amplifier with a
constant-gm input stage is designed on the basis of research on design methods of
low-voltage rail-to-rail operational amplifier. The input stage consists of a
complementary input pairs and a summing circuit which consists of two cascoded
current mirrors. Constant-gm of input stage can be obtained by using one-time current
mirror control circuit with small die area and low noise and the differential input is
converted to single output by the summing circuit. Rail-to-rail floating class-AB output
stage is used to improve power-efficiency and decrease the cross-over distortion. The
main factors limiting the circuit performance are analyzed and the operational amplifier
is optimized by the careful design of devices size. Furthermore, the input stage operates
in the weak inversion region to reduce power supply voltage. The results provided are
based on circuit level Hspice simulation using TSMC µm CMOS process
parameters provided by foundry for BSIM3 transistor models. Finally, the circuit layout
is realized with a TSMC µm DP5M CMOS process, occupying a die area of
380×125µm2.