文档介绍：Verification Methodology
Manual
for
SystemVerilog
Not for (re)distribution
Not for (re)distribution
Verification Methodology
Manual
for
SystemVerilog
by
Janick Bergeron
Eduard Cerny
Alan Hunter
Andrew Nightingale
Not for (re)distribution
Janick Bergeron, Synopsys, Inc. Eduard Cerny, Synopsys, Inc.
Andrew Nightingale, ARM, Ltd. Alan Hunter, ARM, Ltd.
Verification Methodology Manual for SystemVerilog/ by Janick Bergeron ... [et al.].
.
Includes bibliographical references and index.
ISBN-13: 978-0-387-25538-5 (alk. paper)
ISBN-10: 0387-25538-9 (alk. paper)
ISBN-10: 0387-25556-7 (e-book)
1. Verilog (Computer hardware description language) 2. Integrated circuits--
Verification.
I. Bergeron, Janick
V44 2005
’2--dc22
2005051724
Cover: Die photograph of the ARM926EJ-STM PrimeXsysTM Platform Development
Chip 2005 ARM Ltd.
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ded Technologies Pvt. Ltd.; and ARM Physical IP, Inc.
2006 Synopsys, Inc. and ARM Limited
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