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Cadence Verilog Language and Simulation Course.pdf

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Cadence Verilog Language and Simulation Course.pdf

文档介绍

文档介绍:Cadence® Verilog® Language and
Simulation
Version
Lecture Manual February 18, 2002
 1990-2002 Cadence Design Systems, Inc. All rights reserved.
Printed in the United States of America.
Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA
Cadence Trademarks
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Other Trademarks
All other trademarks are the exclusive property of their respective owners.
Confidentiality Notice
No part ofthis publication may be reproduced in whole or in part by any means (including photocopying or storage in an informationstorage/retrieval s ystem)
or transmitted in any form or by any means without prior written permission from Cadence Design Systems, Inc. (Cadence).
Information in this document is subject to change without notice and does not represent mitment on the part of Cadence. The information contained herein
is the proprietary and confidential information of Cadence or its licensors, and is supplied subject to, and may be used only by Cadence’s customer in accordance
with, a written agreement between Cadence and its customer. Except as may be explicitly set forth in such agreement, Cadence does not make, and expressly
disclaims, any representations or warranties as to pleteness, accuracy or usefulness of the information contained in this document. Cadence does not
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