文档介绍：PLL Performance, Simulation, and Design
Frequency
Dividers
1/N
Output
Frequency
( Fout )
Loop
Kf
1/R Filter
Crystal Voltage Controlled
Reference Oscillator
( VCO )
Charge Pump/Phase-Frequency Low Pass
Detector ( PFD ) Filter
Z(s)
By
Dean Banerjee
Copyright 1998 National Semiconductor
PLL Performance, Simulation, and Design Copyright 1998 National Semiconductor 2
Table of Contents
Part I Introduction
i. Preface 5
ii. What’s All of this PLL stuff? 6
iii. The Charge Pump PLL with a Passive Filter 7
Part II PLL Performance
Phase Noise
1. On Noise Sources in a PLL System 11
Discusses the causes of phase noise and how to roughly predict it.
2. On RMS Phase Error and it’s Calculation 19
Discusses the meaning, calculation, and significance of RMS phase error.
Spurs
3. Reference Spurs and their Causes 24
Addresses the causes of reference spurs and what can be done about them.
4. Non-Reference Spurs and their Causes 34
Addresses different types of spurs, their causes, and their cures.
Lock Time
5. Transient Response of PLL Frequency Synthesizers 42
Addresses in depth lock time issues and derives all relevant equations.
Other Topics
6. Discussions of the Phase/Frequency Detector for the Armchair 57
Philosopher
Discusses the how’s and why’s of the operation of the phase-frequency
detector.
Part III PLL Design
Methods for Passive Loop Filter Design
7. Exact Equations for PLL Design 65
Gives design equations that do not use any approximations except
for the continuous time approximation. Uses numerical methods.
8. Designing Loop Filters for Optimal Attenuation 74
Discusses how to choose the value of ATTEN in an optimal way
9. A Fourth Order Filter Design 79
Discusses the theory and design adding additional filtering for
reference sidebands.
PLL Performance, Simulation, and Design Copyright 1998 National Semiconductor 3
More Information on Passive Loop Filter Design
10. The Effect of Va