文档介绍：Freescale Semiconductor Document Number: AN535
Application Note Rev. , 02/2006
Phase-Locked Loop Design Fundamentals
by: Garth Nash
Applications Engineering
Abstract Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 1
The fundamental design concepts for phase-locked loops 2 Parameter Definition . . . . . . . . . . . . . . . . . . 2
implemented with integrated circuits are outlined. The 3 Type - Order . . . . . . . . . . . . . . . . . . . . . . . . . 3
necessary equations required to evaluate the basic loop 4 Error Constants . . . . . . . . . . . . . . . . . . . . . . 4
performance are given in conjunction with a brief design 5 Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
example. 6 Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7 Phase-Locked Loop Design Example . . . 11
NOTE 8 Experimental Results . . . . . . . . . . . . . . . . . 18
This document contains 9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
references to obsolete part 10 Bibliography . . . . . . . . . . . . . . . . . . . . . . . . 21
numbers and is offered for
technical information
only.
1 Introduction
The purpose of this application note is to provide the
electronic system designer with the necessary tools to
design and evaluate Phase-Locked Loops (PLL)
configured with integrated circuits. The majority of all
PLL design problems can be approached using the
Laplace Transform technique. Therefore, a brief review
of Laplace is included to establish mon reference
© Freescale Semiconductor, Inc., 1994, 2006. All rights reserved.
Parameter Definition
with the reader. Since the scope of this article is practical in nature all theoretical derivations have been
omitted, hoping to simplify and clarify the content. A bibliography is included for those who desire to
pursue the theoretical aspect.
2 Parameter Definition
The Laplace Transform permits the representation o