文档介绍：英文
INTRODUCTION
Intel’s innovation and technology leadership has established the foundation for a new and advanced nonvolatile memory technology-Intel StrataFlashTM memory. Intel Strata Flash memory technology significantly increase the number ofbits stored per area by allowing the storage of multiple bits per flash menory cell. This effectively decrease the overall flash cost-per-megabyte. Intel StrataFlash technology builds upon four previous generations of Intel’s ETOXTM flash memory process learning and leverages decades of stacked-gate memory cell manufacturing experience.
Intel’s NOR-based,Multi-Level Cell technology provides direct memory-cell access which is essential in providing accurate charge sensing, placement, andstorage-three key aspects of Intel StrataFlash memory technology. This direct memory cell access results in a reliable, robust technology suitable for many applications.
Intel StrataFlash memory technologies use state-of-theart techniques and algorithms for program, read, and erase. These flash bine EPROM-type programming with EEPROM-like in-system electrical erasure. Sectoring the large memory array into smaller independent-erase blocks, coupled with on-chip program and erase algorithm automation, add advantages to an already efficient and reliable flash memory. This functionality, combined with Intel’s accumulated years of manufacturing experience,electrical-test and temperature-stress data collection,and advanced design/architectural technology innovations yields highly manufacturable, reliable, and cost-effective flash memory。
Intel has considered many aspects of product technology development and usage, and balanced the associated tradeoffs of cell size, array architecture and system design to generate a robust and versatile Multi-Level Cell memory approach. This document describes the fundamentals of Intel StrataFlash memory technology, providing insight to device operating characteristics of program, read, and erase. In additio