文档介绍：IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 3, MARCH 1998 483
On-Chip Measurement of the Jitter Transfer
Function of Charge-Pump Phase-Locked Loops
Benoˆıt R. Veillette, Student Member, IEEE, and Gordon W. Roberts, Member, IEEE
Abstract— An all-digital technique for the measurement of
the jitter transfer function of charge-pump phase-locked loops
(PLL’s) is introduced. Input jitter may be generated using one
of two methods. Both rely on delta–sigma modulation to shape
the unavoidable quantization noise to high frequencies. This
noise is filtered by the low-pass characteristic of the device
and has little impact on the test results. For an input–output
response measurement, the output jitter pared against
a threshold. As the stimulus generation and output analysis
circuits are digital, do not require calibration, and demand a
small area overhead, this jitter transfer function measurement
scheme may be placed on the die to adaptively tune a PLL after
fabrication. The technique can also implement built-in self-test
(BIST) for the characterization or manufacture test of PLL’s.
The validity of the scheme was verified experimentally with off-
the-ponents.
Fig. 1. Jitter transfer function test setup.
Index Terms—Mixed analog-digital integrated circuits, phase-
locked loops, self-testing, semiconductor device testing, sigma–
delta modulation. These cir