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Nanoscale MOS Transistors
Written from an engineering standpoint, this book provides the theoretical background
and physical insight needed to understand new and future developments in the modeling
and design of n- and p-MOS nanoscale transistors. A wealth of applications, illustra-
tions, and examples connect the methods described to all the latest issues in nanoscale
MOSFET design. Key areas covered include:
• Transport in arbitrary crystal orientations and strain conditions, and new channel and
gate stack materials;
• All the relevant transport regimes, ranging from low field mobility to quasi-ballistic
transport, described using a single modeling framework;
• Predictive capabilities of device models, discussed with parisons to
experimental results.
David Esseni is an Associate Professor of Electronics at the University of Udine, Italy.
Pierpaolo Palestri is an Associate Professor of Electronics at the University of Udine,
Italy.
Luca Selmi is a Professor of Electronics at the University of Udine, Italy.
Cover illustration: the images represent the k-space carrier distributions at the end of the
channel of nanoscale n- and p-MOSFETs biased in the saturation region of operation.
“In prehensive text, physicists and electrical engineers will find a thorough treatment
of semiclassical carrier transport in the context of nanoscale MOSFETs. With only a very basic
background in mathematics, physics, and electronic devices, the authors lead readers to a state-of-
the-art understanding of the advanced transport physics and simulation methods used to describe
modern transistors.”
Mark Lundstrom, Purdue University
“This is the most pedagogical prehensive book in the field of CMOS device physics I
have ever seen.”
Thomas Skotnicki, STMicroelectronics
“This is a modern and rigorous treatment of transport in advanced CMOS devices. The detailed
plete description of the models and the simulation techniq